Hardware Latching Encoder Z Index

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TFrenken
Posts: 19
Joined: Mon Dec 25, 2023 10:36 am

Hardware Latching Encoder Z Index

Post by TFrenken » Wed Apr 08, 2026 3:52 pm

Hi Tom,

as far as I know there is no Hardware Latching function in KMotion. With a short Z signal (0.1µm) you have to use quite low speeds when homing the machine. It works ok especially if the slow speed is only used right before the estimated position of the Z signal. However it would be great if Hardware Latching would be possible(Z signal also uses an encoder input).

Regards,
Thomas

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TomKerekes
Posts: 2922
Joined: Mon Dec 04, 2017 1:49 am

Re: Hardware Latching Encoder Z Index

Post by TomKerekes » Fri Apr 10, 2026 10:54 pm

Hi Thomas,

Here is a patched Firmware for Version 5.4.1 that adds a latched register for the 24 differential inputs. An FPGA 32-bit register holds the latched inputs in the lower 24 bits. The register is defined as:

Code: Select all

#define LatchedDiffIn 0x1c0  // FPGA Address for 24 Latched Diff Inputs, read as 32-bit word, write 0's to clear
The latched bits will be set on the rising edge of the input. Any pulse greater than 60ns should be reliably detected. Write 0's to bits to clear.

Note it takes several FPGA 16.7MHz clocks to synchronize and set the latches so reading the register immediately (within 120ns) after the rising edge may not yet show the latched status.

Copy these files to the DSP_KOGNA folder and Flash new Version. It will report as Version 5.4.1XXX

DSPKOGNA.bin
DSPKOGNA.out
DSPKOGNA.sym
KMotionDef.h



Here is a test example that assumes Differntial Output #0 has been looped back to Differential Input #0 (CHA0) and pulsed for a fraction of a us to set the bit.

Code: Select all

#include "KMotionDef.h"

int main()
{
    FPGA32(LatchedDiffIn) = 0x000000;       // Clear all latched bits
    printf("%8X\n", FPGA32(LatchedDiffIn)); // display latched bits

    // Pulse Differential Output 0 looped back to Diff input 0 for ~ 400ns
    SetBit(250);
    ClearBit(250);

    for (;;)
    {
        printf("%8X\n", FPGA32(LatchedDiffIn)); // display latched bits
        Delay_sec(2);
    }

    return 0;
}
Regards,

Tom Kerekes
Dynomotion, Inc.

TFrenken
Posts: 19
Joined: Mon Dec 25, 2023 10:36 am

Re: Hardware Latching Encoder Z Index

Post by TFrenken » Mon Apr 13, 2026 7:50 pm

Hi Tom,

as always I am impressed how quick you reply and are able to find a solution. If I understand correctly this latch should make sure the impuls is always detected. However the actual encoder position during the impuls would not be saved in a register. Is it possible to save the encoder counts in an register when an Z signal is detected? If this would be possible this position could be read by a C Program for homing.

Regards,
Thomas

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TomKerekes
Posts: 2922
Joined: Mon Dec 04, 2017 1:49 am

Re: Hardware Latching Encoder Z Index

Post by TomKerekes » Tue Apr 14, 2026 7:04 pm

Hi Thomas,

I was thinking moving relatively slow would allow software sampling. Adding hardware capture registers for all the encoders would use significant FPGA resources.

Software encoder sampling at 90us at resolution of 0.1um can be achieved at:
0.1um / 90us = 1.1mm/s

Moving fast at say 100mm/s should locate the Index within
100mm/s x 90us = 9um

So the "slow" scan should only take a fraction of a second.
Regards,

Tom Kerekes
Dynomotion, Inc.

TFrenken
Posts: 19
Joined: Mon Dec 25, 2023 10:36 am

Re: Hardware Latching Encoder Z Index

Post by TFrenken » Wed Apr 15, 2026 3:23 pm

Hi Tom,
thanks again for the quick reply. Of course you are right that with the fast search using the new latching function the slow and precise search would start very near the actual Imdex. Will this latching function be implemented in the new software version?

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TomKerekes
Posts: 2922
Joined: Mon Dec 04, 2017 1:49 am

Re: Hardware Latching Encoder Z Index

Post by TomKerekes » Wed Apr 15, 2026 3:36 pm

Yes it should be in 5.4.2 when we release it.
Regards,

Tom Kerekes
Dynomotion, Inc.

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