Encoder inputs frequency limit

[TFrenken]

Hello Tom,

we use Ditron DC10 linear scales with 0.1 µm resolution (RS422 differential signal) in a retrofitted DMU 50 with KOGNA 1.3. All encoders are connected to JP8. We ran into problems on Encoder channel 8 when we exceed about 1.6 MHz input frequency. On channel 9 it is about 2.3 MHz and channel 10 is able to work up to about 3 MHz which is near the planned maximum speed of 20 m/min(3.333 MHz).

After checking and changing the scales(new ones had the same issues) and testing the drives of the machine without closing the loop we found that the encoder channels behave differently. This happens even if we move a dismounted scale by hand. Channel 10 is able to reach nearly double the speed than channel 8. Electrically the only difference is that channel 8 has the shortest wires between the breakout board and connector (only about 40mm) and chan 10 the longest (about 80mm). The IDE cable from the breakout board to KOGNA is 300mm.

I have not yet changed the encoder inputs to different channels. Maybe you have any idea what could be the problem as the encoder channels should be able to handle up to 5 MHz.

Regards,
Thomas

[TomKerekes]

Hi Thomas,

What do you see? Some missing counts or complete stopping of counts?

Ideally the encoder cable should be twisted pairs right up to the Kogna connector.

Kogna only has mild 450 ohm termination on-board. To avoid reflections and ringing the termination should be 120ohms. So you might add 160ohms termination in parallel (from the + to - inputs) to make it proper 120 ohms.

Kogna's Encoder Inputs are clocked at 66Mhz and have a digital filter to reject glitches. By default the digital filter is set to 7. Which rejects changes less that 7 clocks long. This should handle 66/7= 9.4M quadrature counts/sec. So that shouldn't be a problem.

What Version are you running?

[TFrenken]

Hi Tom,

it is a complete stopping of counts until the frequency drops below the threshold, than the counts start again. The software is the latest version 5.4.2, the KOGNA is Version 1.3.

I will try the additional resistors and see if it changes anything, but I will have to put them on the breakout board.

Could there be a reason for the different in max frequency between the chanels? Could it be a hardware issue of the KOGNA? There are no damages on this board as far as I know but this specific KOGNA is used for the initial setup of our machines and will later be swapped to a unused KOGNA.

Regards,
Thomas

[TomKerekes]

Hi Thomas,

There shouldn't be any differences in channels.

I ran a test with Differential Outputs 12-19 looped back to Differential Inputs 12-19. Then ran a program to quadrature toggle a pair of bits as fast as possible. Kogna can do 100 cycles (400 counts) within one time slice. This works out to 6.3M counts/sec. These Differential inputs are Encoder inputs 14-17. I tested those 4 input channels without issues. I didn't put termination resistors. The loop back ribbon cable was only ~ 6inches long.

I also tested single ended ended encoder inputs 4-7 which doesn't require a loopback cable as those inputs on JP7 can be configured as outputs.

So if driven properly the inputs should work to over 5MHz.

I can't find a manual for DC10 encoders.

Output

Code: Select all

DT =6.295618e-05 Vel=6.3536e+06 counts/sec  dx=400.000000 3403.000000 3803.000000

Program (An axis must be configured as Encoder input with the appropriate differential inputs)

Code: Select all

#pragma TI_COMPILER(3)
#include "KMotionDef.h"

void FastSetBit(int bit)
{
    int n = bit - KOGNA_DIFF_OUT0;
    FPGA(BIT_SET + DIFF_OUT_FPGA_OFFSET + (((unsigned int)n) >> 3)) = (unsigned char)(1 << (n & 7));
}

void FastClearBit(int bit)
{
    int n = bit - KOGNA_DIFF_OUT0;
    FPGA(BIT_CLR + DIFF_OUT_FPGA_OFFSET + (((unsigned int)n) >> 3)) = (unsigned char)(~(1 << (n & 7)));
}

int main()
{
    double x0, dx, t0, t1, x1;
    int i;

    FPGA32(STEP_RATE_ADD) = 4 << 24; // Disable Step/Dir Generators
    FPGA32(STEP_RATE_ADD) = 5 << 24;

    SetBitDirection(38, 1);
    SetBitDirection(39, 1);

#define N 100  // # of cycles
#define K 262 // Bit pair to toggle
#define A 0   // axis for encoder

    t0 = WaitNextTimeSlice();
    x0 = chan[A].Position;
    for (i = 0; i < N; i++)
    {
        FastSetBit(K);
        FastSetBit(K + 1);
        FastClearBit(K);
        FastClearBit(K + 1);
    }
    t1 = Time_sec();
    WaitNextTimeSlice(); // wait for value to update
    x1 = chan[A].Position;
    dx = x1 - x0;

    printf("DT =%e Vel=%7.4e counts/sec  dx=%f %f %f\n", t1 - t0, dx / (t1 - t0), dx, x0, x1);
}