Dynomotion Forum

Hello!

I've been working with the Dynomotion suite for the better part of a year now and have found most aspects to be robust and fairly straightforward. The only issue which has continued to crop up around our system is the ~30kHz switching noise from the SnapAmp which dirties up my IO wherever it gets the chance. For the most part I have been able to mitigate this via opto-inputs, filtering, and pull-downs, however most recently I've hit something of an impasse with noise coupling into my UART comms. 

I have a ceramic heater and voice coil wired up to the SnapAmp, both on side A, with supply voltage 80V, and the resulting switching transients when using PWMR are very noticeable - even with shielded cables and the ground lug tightly connected between the SnapAmp and the KFLOP. There is a thermocouple in the ceramic heater which runs to a separate microcontroller which interprets the temperature data and then sends the current temperature as a 32-bit float over UART to IO_44 and IO_45 (Rx, Tx, respectively) on JP7.

Unfortunately, due to the current layout of our system, the ribbon cable between JP7 on the KFLOP and the JP7 breakout board to which the microcontroller is wired is roughly 10 inches long. I can take off another 1 or 2 inches before it's taut, I figured this might help a bit but most likely wouldn't fix the issue. As is, when the system is booted up, without running my init.c program (which clears the fault on the SnapAmp), I can communicate freely at any baud rate with the microcontroller without any errors or issues. However, the moment I run init.c and the switching transients appear (even with both SnapAmp channels set to PWMR#=0), the UART gets overwhelmed with 1's and spit out byte 255 without discrimination. I ordered and assembled the user-made JP7 isolated, filtered, and pulled-down breakout board that you guys endorse on your wiki and replaced the JP7 breakout board with that one. The first thing I noticed was that the opto-inputs are inverted so they messed up the Rx signal - it seems neither the KFLOP nor the microcontroller I'm using can invert this signal to negate this effect - so it seems I have to stick with the filtered inputs which I still expected to be useful.

They were! sort of... The filtered and pulled_down inputs were able to withstand the initial PWMR0 switching transients upon running init.c, and I was able to send data over UART without error. However, above modest PWMR values of 7-10 - ONLY on the ceramic heater (pulling maybe 1A max at that time) with the voice coil commanded to PWMR0 - the UART gets muddled by the noise.

I realize that shortening the cable between the JP7 breakout board and the JP7 connector could very well be the solution to this issue, but regardless I see this noise everywhere and find myself continuing to take extra measures to remove it from my logic signals. I propose this: place 11 bi-directional high-speed digital isolators with propogation delay < 6ns, rise time < 4ns, fall time < 4ns, for the 10 IO bits and the #RESET pin, and 3.3V, 5V, and 12V isolated DC-to-DC power supplies to create new isolated 3.3V, 5V, and 12V sources, all on a PCB. If such components were placed on a custom-made PCB with two 16-pin connectors such that it could be placed between JP4 on the KFLOP and JP6 on the SnapAmp, I would expected the majority of this switching noise to be removed from the rest of my system.

Is this a realistic expectation? And furthermore, possibly more importantly, would I break anything??

Thank you so much in advance for any time any of you end up taking to aid me in my pursuits!

Hi Griffin,

Strange there would be so much noise with fairly low currents. SnapAmp not being isolated is it's major drawback. But this normally only becomes problematic switching 10's of Amps with multiple motors. Grounding is very complex. Maybe you could describe your grounding, earth grounding, power supplies, shielding, etc.

As is, when the system is booted up, without running my init.c program (which clears the fault on the SnapAmp), I can communicate freely at any baud rate with the microcontroller without any errors or issues. However, the moment I run init.c and the switching transients appear (even with both SnapAmp channels set to PWMR#=0), the UART gets overwhelmed with 1's and spit out byte 255 without discrimination.

Do you have an oscilloscope to look for noise? Maybe just an RC filter might work.

I ordered and assembled the user-made JP7 isolated, filtered, and pulled-down breakout board that you guys endorse on your wiki and replaced the JP7 breakout board with that one. The first thing I noticed was that the opto-inputs are inverted so they messed up the Rx signal - it seems neither the KFLOP nor the microcontroller I'm using can invert this signal to negate this effect - so it seems I have to stick with the filtered inputs which I still expected to be useful.

Actually I see there is common GND which defeats the purpose of isolation.

I propose this: place 11 bi-directional high-speed digital isolators with propogation delay < 6ns, rise time < 4ns, fall time < 4ns, for the 10 IO bits and the #RESET pin, and 3.3V, 5V, and 12V isolated DC-to-DC power supplies to create new isolated 3.3V, 5V, and 12V sources, all on a PCB. If such components were placed on a custom-made PCB with two 16-pin connectors such that it could be placed between JP4 on the KFLOP and JP6 on the SnapAmp, I would expected the majority of this switching noise to be removed from the rest of my system.

That's an interesting idea. But the timing is quite critical between KFLOP and Snap Amp. There is basically a 4-bit bidirectional data bus that runs at an 8.33MHz clock rate. So that 120ns cycles. This over ribbon cable is quite difficult.

IO16 is a KFLOP Output
IO17-20 is bidirectional data
IO 21 is not used
IO 22 is a KFLOP Input (Read clock from SnapAmp)
IO 23 is a KFLOP Output (write clock)
#RESET is a KFLOP Output

Theses pins are terminated with 150 Ohm resistors so interface must be capable of driving this.

SnapAmp only uses +5V from KFLOP. Other voltages (3.3 and 12V) are not needed.

If the data and clocks are equally delayed both directions then theoretically the timing should be the same.

Is this a realistic expectation? And furthermore, possibly more importantly, would I break anything??

Well I suppose corrupted commands could command random currents and whatnot so there would be some risk.

Hi Tom,

Thank you for your reply, I appreciate the help! For reference, here is more information on the grounding, earth grounding, power supplies, and shielding:

The full setup consists of a KFLOP stacked on top of a SnapAmp with a KSTEP adjacent to them - connected via JP5 (RJ45 Connector). There is an 80V isolated power supply wired to side A of the Snapamp, a 24V isolated power supply wired to VBB on the KSTEP, and a 12V isolated power supply run through an ATX power supply breakout board which then provides power to the KFLOP. Earth ground is wired to the aluminum chassis via screw connection. None of the power supply grounds are connected externally, thus the system is quasi-star grounded at the KFLOP/SnapAmp/KSTEP interface - as the grounds are connected across ground planes and ribbon cables.

Now that I think about it, the cable carrying the 80V supply to the SnapAmp is not over a shielded wire, just a twisted pair - could the noise appear on the supply line and couple to other wires? The stepper motor shields are grounded to 24V ground, at the point that it is inserted into the KSTEP. The heating element and voice coil shields are grounded to the 80V ground, at the point that it is inserted into the KSTEP.

The KSTEP drives 4 stepper motors all of which have shielded cables, as do the voice coil and heating element being driven by the SnapAmp. I forgot to mention in my post that the voice coil - although not being driven when I encountered the UART issues - is driven to a peak current of 13A during its actuation, and introduces further noise.

As for the isolation proposal, thank you so much for the information it's super helpful! I'll attempt to implement it with critical timing in mind and report back here.

Edit: Are the data signals all 3.3V? When I used the 16-pin ribbon cable with an extra connector (intended for stack SnapAmps) to expose the data lines to my scope I noticed the traces were more around ~3V. Should I try to maintain this voltage level across the isolator, or would 3.3V work?

Grounding is complex but one approach is to connect shields that are on noisy signals (Motor wiring, supply wiring, etc) with the purpose of collecting noise and preventing radiation of noise, to be connected to earth gnd away from KFLOP. If these shields are connected to the KFLOP/SnapAmp/KStep DC GNDS then you risk injecting collected noise into KFLOP. Logic signals like RS232, encoders, general inputs, etc where the shields are trying to protect the signals from noise should be connected to the DC GND of the device receiving the signals at one end only.

Edit: Are the data signals all 3.3V? When I used the 16-pin ribbon cable with an extra connector (intended for stack SnapAmps) to expose the data lines to my scope I noticed the traces were more around ~3V. Should I try to maintain this voltage level across the isolator, or would 3.3V work?

Yes they are all LVTTL 3.3V signals. However 5V TTL and 3.3V LVTTL signals only need to drive to a high of about 2V or higher.

Hi Tom,

I was able to overcome the noise issue in my UART line by using a BJT as a NOT gate to invert the signal before using an optocoupler (which inverts the signal again - back to normal), however I do still see the switching noise all over my system. I've put my isolation proposal on hold for the time being, but I was curious what you thought about the impact of placing 30KHz band-reject filter on the ground connection between the SnapAmp and KFLOP, such that switching transients don't conduct into the logic ground. Do you think this would pose any advantages? Do you suspect the noise to be predominantly radiated or conducted?

Thanks in advance,
Griffin Boyle

Hi Tom,

I was able to overcome the noise issue in my UART line by using a BJT as a NOT gate to invert the signal before using an optocoupler (which inverts the signal again - back to normal), however I do still see the switching noise all over my system. I've put my isolation proposal on hold for the time being, but I was curious what you thought about the impact of placing 30KHz band-reject filter on the ground connection between the SnapAmp and KFLOP, such that switching transients don't conduct into the logic ground. Do you think this would pose any advantages? Do you suspect the noise to be predominantly radiated or conducted?

Thanks in advance,
Griffin Boyle

Hi Griffin,

I was curious what you thought about the impact of placing 30KHz band-reject filter on the ground connection between the SnapAmp and KFLOP, such that switching transients don't conduct into the logic ground. Do you think this would pose any advantages?

Although the switching occurs at 30KHz I think the noise is caused by the 80V switching in the order of 100ns which corresponds to 10's of megahertz so I don't think a 30KHz filter would help.

Do you suspect the noise to be predominantly radiated or conducted?

Probably radiated